Technology of digital components, TTL Logic Families, TTL, PECL, ECL, Positive Emitter Coupled Logic

Transistor-transistor logic, or TTL, is a family of digital circuits built from bipolar junction transistors, named because both the logic and the amplifying functions of a gate are performed by transistors. It became one of the most widely used standards in digital electronics, most familiar in the 7400 series of chips. Standard TTL operates from a nominal five-volt supply and defines fixed voltage ranges that count as a valid logic low and a valid logic high.

Two properties describe how TTL gates connect to one another. Fan-out is the number of inputs a single output can drive reliably, limited by how much current the output can source and sink. Fan-in is the number of inputs to a gate. The noise margin is the gap between the worst-case output voltage and the input threshold; it measures how much unwanted noise a signal can tolerate before being misread. Outputs are usually active, but an open-collector output can only pull its line low and needs an external pull-up resistor, allowing several outputs to share a line or to drive higher voltages. A tri-state output adds a disconnected high-impedance state for bus sharing.

For applications needing more speed, emitter-coupled logic (ECL) keeps its transistors out of saturation and switches very fast, using differential signalling at the cost of higher power. Positive ECL (PECL) runs the same circuit topology from a positive supply for easier interfacing. Low-voltage differential signalling (LVDS) is another differential scheme used for fast data links. Many TTL-compatible parts were later reimplemented in CMOS to cut power while keeping the same pinouts and logic thresholds.

Frequently asked questions

What do fan-in and fan-out mean?: Fan-in is the number of inputs a gate has, and fan-out is the number of gate inputs that a single output can reliably drive given its current limits.
What is noise margin?: It is the voltage difference between a gate's guaranteed output level and the input level it is still read correctly at, indicating how much noise a signal can tolerate.
How does ECL achieve high speed?: Its transistors operate without saturating and switch differentially, so they change state very quickly, which is why ECL and PECL are used in fast circuits despite higher power use.

Digital electronics:
Arithmetic circuits	D/A-A/D converters	Number systems
Codes and decoders	Flip flops	Technology
Counters and registers	General overview	Technology-CMOS
Digital logic	Memories	Technology-TTL	Timers and oscillators

TTL - technology

74 Series Logic ICs 74LS (Low-power Schottky) family, 74HC family High-speed CMOS circuitry, 74HCT family, a special version of 74HC with 74LS TTL-compatible inputs, open collector outputs

Comparison of MM74HC to 74LS, 74S and 74ALS Logic The MM54HC/MM74HC family of high speed logic components provides a combination of speed and power characteristics that is not duplicated by bipolar logic families or any other CMOS family, pdf file

Designing with TTL Designing with TTL, pdf file

DIODE TRANSISTOR LOGIC (DTL) pdf file

Diode-Transistor Logic (DTL) pdf file

DIODE TRANSISTOR LOGIC diode transistor logic, pdf file

Drive Capabilities & Propagation Delay output of a TTL IC, propagation delay

Famille TTL en Français, pdf file

Gate characteristics basic characteristic and limitations of gates, Totem-Pole Output, TTL Open-Collector Output, Tri-State Outputs

Low-Power Schottky TTL (74LS) pdf file

Termination of ECL Logic Devices with EF (Emitter Follower) OUTPUT Structure A standard Emitter Coupled Logic (ECL) output driver typically uses a current switching differential with an emitter follower for level shifting the output and the internal CML levels to familiar ECL levels, ..., pdf file

TTL en Français

TTL Design Checklist TTL Logic Families

TTL logic gates pdf file

TTL NOR-OR gate pdf file

Transistor transistor logic TTL gate

Transistor transistor logic TTL, Transistor transistor logic, TTL gate, pdf file

Transistor-Transistor Logic and BiCMOS

Transistor transistor logic gates transistor transistor logic gates, pdf file

TRANSISTOR-TRANSISTOR LOGIC (TTL)-inverter pdf file

ECL - PECL technology

AC Characteristics of ECL Devices

Comparison of LVDS, CMOS, and ECL pdf file

PECL Positive Emitter Coupled Logic technology, (PECL)

ECL ECL: Emitter Coupled Logic

ECL Emitter Coupled Logic, pdf file

ECL Backplane Design ECL outputs are perfectly suited to drive transmission lines. With an output impedance of 6Ω to 8Ω and rise times less than 1 ns, reflections are minimized resulting in a clean signal, pdf file

ECL Clock Distribution Techniques ECL Clock Distribution Techniques application note, This application note provides information on system design using ECL logic technologies for reducing system clock skew over the alternative CMOS and TTL technologies, pdf file

ECL design principles ECL design principles, pdf file

Emitter Coupled Logic Emitter Coupled Logic

Interfacing Between LVDS and ECL Interfacing Between LVDS and ECL application note, pdf file

Operating ECL from a Single Positive Supply pdf file

PECL Positive Emitter Coupled Logic (PECL) is a positive supply rail referred high-speed transmission standard that has been optimized for use in bipolar IC technology, pdf file

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